Ruilong Xie, Chanro Park, et al.
VLSI Technology 2019
We report partially depleted silicon-on-insulator p-channel field-effect transistors fabricated with a 32-nm-technology ground rule and featuring SiGe raised source/drain, SiGe channel, and implant-free extension formation process. A respectable drive current of 950 μAm is obtained at an off current of 100 nAμm, VDD = 1V, and a contacted gate pitch of 130 nm. Furthermore, when the transistor width is scaled down to 100 nm, the saturation transconductance increases by about 15%, leading to a drive current of 1100 μAm. © 2006 IEEE.
Ruilong Xie, Chanro Park, et al.
VLSI Technology 2019
Kangguo Cheng, Ali Khakifirooz, et al.
CSTIC 2010
Kangguo Cheng, A. Khakifirooz, et al.
VLSI Technology 2011
Jeng-Bang Yau, Jin Cai, et al.
VLSI-TSA 2009