Conference paper
RF perspective of sub-tenth-micron CMOS
C. Wann, L. Su, et al.
ISSCC 1998
The measurement of the accumulated phase error of phase-locked loops (PLLs) in microprocessor systems is discussed. A system which creates controlled power supply noise and measures the PLL response is described. Examples of the use of this technique are shown for a PLL used in a 400MHz microprocessor.
C. Wann, L. Su, et al.
ISSCC 1998
G. Shahidi, J. Warnock, et al.
VLSI Technology 1993
A. Deutsch, W.D. Becker, et al.
IEEE Topical Meeting EPEPS 1996
D. Heidel, U. Bapst, et al.
IEEE TNS