FPGA-based coprocessor for text string extraction
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
New and effective modeling methodologies have been developed to stimulate particle transport in arbitrarily complex back-end-of-line (BEOL) topologies of a semiconductor chip. They are applied to address a number of critical problems that involve the single-event-effect analysis of new device structures for 65-nm CMOS (complementary metal-oxide semiconductor) technologies and beyond. These new simulation techniques also provide a generic building block on which a new version qf the IBM soft-error Monte Carlo model (SEMM-2) is constructed. In this paper, we review the basic concepts of this development and discuss some important applications. © Copyright 2008 by International Business Machines Corporation.
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
Thomas M. Cover
IEEE Trans. Inf. Theory
Xiaozhu Kang, Hui Zhang, et al.
ICWS 2008
György E. Révész
Theoretical Computer Science