0.5 μm CMOS devices and circuits fabricated using synchrotron X-ray lithography
- L.K. Wang
- C.H. Hsu
- et al.
- 1989
- VLSI Technology 1989
Conference paper
Publications
35 results for L.K. Wang
Fully scaled 0.5 μm MOS circuits by synchrotron radiation X-ray lithography: Devices fabrication and overlay evaluation
- J. Silverman
- V. Dimilia
- et al.
- 1989
- Microelectronic Engineering
PaperHot-Electron-Induced Instability in 0.5-μm p-Channel MOSFET’s Patterned Using Synchrotron X-ray Lithography
- C.C.-H. Hsu
- L.K. Wang
- et al.
- 1989
- IEEE Electron Device Letters
PaperFully scaled 0.5 micron CMOS technology using variable shaped electron beam lithography
- Philip Coane
- Paul Rudeck
- et al.
- 1989
- Proceedings of SPIE 1989
Conference paper0.5 μm CMOS device design and characterization
- H.I. Hanafi
- M.R. Wordeman
- et al.
- 1987
- ESSDERC 1987
Conference paperBipolar Transistor with Self-Aligned Lateral Profile
- G.P. Li
- Tze-Chiang Chen
- et al.
- 1987
- IEEE Electron Device Letters
PaperSource-Drain Contact Resistance in CMOS with Self-Aligned TiSi2
- Yuan Taur
- Jack Yuan-Chen Sun
- et al.
- 1987
- IEEE T-ED
Paper0. 5- mu M-CHANNEL CMOS TECHNOLOGY OPTIMIZED FOR LIQUID-NITROGEN-TEMPERATURE OPERATION.
- J.Y.-C. Sun
- Y. Taur
- et al.
- 1985
- IEDM 1985
Conference paper0. 5 MICRON GATE CMOS TECHNOLOGY USING E-BEAM/OPTICAL MIX LITHOGRAPHY.
- L.K. Wang
- Y. Taur
- et al.
- 1985
- VLSI Technology 1985
Conference paperA Highly Latchup-Immune 1-μm CMOS Technology Fabricated with 1-MeV Ion Implantation and Self-Aligned TiSi2
- Fang-Shi J. Lai
- L.K. Wang
- et al.
- 1986
- IEEE T-ED
Paper