A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices
- Nicolas Loubet
- T. Devarajan
- et al.
- 2019
- IEDM 2019
Conference paper
Publications
14 results for Robin Chao
Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- J. Zhang
- S. Pancharatnam
- et al.
- 2019
- IEDM 2019
Conference paperImaging, Modeling and Engineering of Strain in Gate-All-Around Nanosheet Transitors
- S. Reboh
- V. Boureau
- et al.
- 2019
- IEDM 2019
Conference paperChannel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet
- Chun Wing Yeung
- Jingyun Zhang
- et al.
- 2018
- IEDM 2018
Conference paperHighly-selective superconformai CVD Ti silicide process enabling area-enhanced contacts for next-generation CMOS architectures
- Nicolas Breil
- A. Carr
- et al.
- 2017
- VLSI Technology 2017
Conference paperStacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
Conference paperA 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
Conference paperAdvanced in-line metrology strategy for self-aligned quadruple patterning
- Robin Chao
- Mary Breton
- et al.
- 2016
- SPIE Advanced Lithography 2016
Conference paperAdvanced in-line optical metrology of sub-10nm structures for gate all around devices (GAA)
- R. Muthinti
- Nicolas Loubet
- et al.
- 2016
- SPIE Advanced Lithography 2016
Conference paperScatterometry-based defect detection for DSA in-line process control
- Robin Chao
- Chi Chun Liu
- et al.
- 2015
- SPIE Advanced Lithography 2015
Conference paper