III-V-on-CMOS Devices and Circuits: Opportunities in Quantum Infrastructure
- C. B. Zota
- Thomas Morf
- et al.
- 2019
- IEDM 2019
Conference paper
Publications
62 results for W. Riess
Quantum optimization using variational algorithms on near-term quantum devices
- Nikolaj Moll
- Panagiotis Kl. Barkoutsos
- et al.
- 2018
- Quantum Science and Technology
ReviewTuning of electrical and optical properties of organic LEDs using combinatorial device fabrication
- T.A. Beierlein
- H. Riel
- et al.
- 2012
- Journal of the Society for Information Display
PaperSilicon nanowire tunnel FETs: Low-temperature operation and influence of high-k gate dielectric
- K. Moselund
- Mikael T. Björk
- et al.
- 2011
- IEEE T-ED
PaperA simulation-based study of sensitivity to parameter fluctuations of silicon tunnel FETs
- Kathy Boucart
- Adrian M. Ionescu
- et al.
- 2010
- ESSDERC 2010
Conference paperVLS-grown silicon nanowires - Dopant deactivation and tunnel FETs
- Mikael T. Björk
- K. Moselund
- et al.
- 2010
- SNW 2010
Conference paperAsymmetrically strained all-silicon multi-gate n-Tunnel FETs
- M. Najmzadeh
- K. Boucart
- et al.
- 2010
- Solid-State Electronics
PaperOff axis holography of doped and intrinsic silicon nanowires: Interpretation and influence of fields in the vacuum
- M.I. Den Hertog
- L. Rouviere
- et al.
- 2010
- JPCS
Conference paperVLS-grown silicon nanowire tunnel FET
- K. Moselund
- H. Ghoneim
- et al.
- 2009
- DRC 2009
Conference paperAsymmetrically strained all-silicon Tunnel FETs featuring 1V operation
- Kathy Boucart
- Adrian M. Ionescu
- et al.
- 2009
- ESSDERC 2009
Conference paper