A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices
- Nicolas Loubet
- T. Devarajan
- et al.
- 2019
- IEDM 2019
Conference paper
Publications
22 results for X. Miao
Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- J. Zhang
- S. Pancharatnam
- et al.
- 2019
- IEDM 2019
Conference paperDirect Partition Measurement of Parasitic Resistance Components in Advanced Transistor Architectures
- Zuoguang Liu
- Heng Wu
- et al.
- 2019
- VLSI Technology 2019
Conference paperChannel Strain Dependence of Tinv in Strained Si and Sil-xGexFETs: Internal Strain-induced Modification of Chemical Oxidation
- Choonghyun Lee
- Shogo Mochizuki
- et al.
- 2019
- VLSI Technology 2019
Conference paperSiGe Channel CMOS: Understanding Dielectric Breakdown and Bias Temperature Instability Tradeoffs
- Richard G. Southwick
- Miaomiao Wang
- et al.
- 2019
- VLSI Technology 2019
Conference paperBias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor
- Miaomiao Wang
- Jingyun Zhang
- et al.
- 2019
- IRPS 2019
Conference paperToward High Performance SiGe Channel CMOS: Design of High Electron Mobility in SiGe nFinFETs Outperforming Si
- Choonghyun Lee
- Richard G. Southwick
- et al.
- 2018
- IEDM 2018
Conference paperNovel Materials and Processes in Replacement Metal Gate for Advanced CMOS Technology
- Ruqiang Bao
- Steven Hung
- et al.
- 2018
- IEDM 2018
Conference paperTechnique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET
- Phil Oldiges
- Chen Zhang
- et al.
- 2018
- SISPAD 2018
Conference paperFinFET external resistance analysis by extended shift-and-ratio method
- Chen Zhang
- Zuoguang Liu
- et al.
- 2018
- IEEE T-ED
Paper