Novel enhanced stressor with graded embedded SiGe source/drain for high performance CMOS devices
- J.-P. Han
- H. Utomo
- et al.
- 2006
- IEDM 2006
Conference paper
Publications
18 results for Z. Luo
Process induced stress for CMOS performance improvement
- S. Fang
- S.S. Tan
- et al.
- 2006
- ICSICT 2006
Conference paperInteraction of middle-of-line (MOL) temperature and mechanical stress on 90nm hi-speed device performance and reliability
- K.Y. Lim
- V. Chan
- et al.
- 2005
- ESSDERC 2005
Conference paperDesign of high performance PFETs with strained Si channel and laser anneal
- Z. Luo
- Y.F. Chong
- et al.
- 2005
- IEDM 2005
Conference paperHigh performance CMOS bulk technology using direct silicon bond (DSB) mixed crystal orientation substrates
- Chun-Yung Sung
- Haizhou Yin
- et al.
- 2005
- IEDM 2005
Conference paperHigh performance and low power transistors integrated in 65nm bulk CMOS technology
- Z. Luo
- A. Steegen
- et al.
- 2004
- IEDM 2004
Conference paperThermally robust dual-work function ALD-MN x MOSFETs using conventional CMOS process flow
- D.-G. Park
- Z. Luo
- et al.
- 2004
- VLSI Technology 2004
Conference paperThermally stable ultra-thin Zr silicate for CMOS applications
- Z. Luo
- T.P. Ma
- et al.
- 2001
- International Symposium on VLSI Technology, Systems, and Applications, Proceedings
Paper