Direct silicon bonded (DSB) substrate solid phase epitaxy (SPE) integration scheme study for high performance bulk CMOS
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- 2006
- IEDM 2006
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10 results for V. Ku
65nm CMOS technology for low power applications
- A. Steegen
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- 2005
- IEDM 2005
Conference paperHigh performance CMOS bulk technology using direct silicon bond (DSB) mixed crystal orientation substrates
- Chun-Yung Sung
- Haizhou Yin
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- 2005
- IEDM 2005
Conference paperAdvanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Conference paperHigh performance and low power transistors integrated in 65nm bulk CMOS technology
- Z. Luo
- A. Steegen
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- 2004
- IEDM 2004
Conference paperThermally robust dual-work function ALD-MN x MOSFETs using conventional CMOS process flow
- D.-G. Park
- Z. Luo
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- 2004
- VLSI Technology 2004
Conference paperDual work function metal gate CMOS using CVD metal electrodes
- V. Narayanan
- A.C. Callegari
- et al.
- 2004
- VLSI Technology 2004
Conference paperDevice Design Considerations for Ultra-Thin SOI MOSFETs
- B. Doris
- M. Ieong
- et al.
- 2003
- IEDM 2003
Conference paperTwo gates are better than one
- P. Solomon
- K.W. Guarini
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- 2003
- IEEE Circuits and Devices Magazine
PaperTriple-self-aligned, planar double-gate MOSFETs: Devices and circuits
- K.W. Guarini
- P. Solomon
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- 2001
- Technical Digest-International Electron Devices Meeting
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