Scaling Single Expose EUV Gate LER Through Source-Resist-Mask Co-optimization
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2026
- SPIE Advanced Lithography + Patterning 2026
Conference paper
Publications
5 results for Gopal Kenath
Dose reduction strategies for low-n PSM absorber using pupil and mask bias optimization at 0.33NA EUV lithography
- Rajiv Sejpal
- Gopal Kenath
- et al.
- 2025
- Photomask Japan 2025
Conference paperEvaluating Novel Material Stacks Towards Gate Width Roughness Reduction
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
Conference paperDry Resist Characterization Towards Technology Insertion for 28-36P EUV Patterning
- Yasiel Cabrera
- Gopal Kenath
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
TalkEUV patterned gate variation reduction in next generation transistor architectures
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Conference paper