Non-poisoning dual damascene patterning scheme for low-k and ultra low-k BEOL
- W. Cote
- D. Edelstein
- et al.
- 2006
- ADMETA 2006
Conference paper
Publications
147 results for Daniel Edelstein
Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ADMETA 2005
Conference paperDetermination of the thermal conductivity of composite low-k dielectrics for advanced interconnect structures
- F. Chen
- J. Gill
- et al.
- 2006
- Microelectronics Reliability
PaperExtendibility of PVD barrier/seed for BEOL Cu metallization
- C.-C. Yang
- D. Edelstein
- et al.
- 2005
- IITC 2005
Conference paperInterconnect Issues post 45nm
- S.M. Rossnagel
- Robert L. Wisnieff
- et al.
- 2005
- IEDM 2005
Conference paperStress migration reliability of copper interconnect stacked via structures with adjacent copper plates in low k- dielectrics
- D. Nguyen
- Kaushik Chanda
- et al.
- 2005
- VMIC 2005
Conference paperLower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
Conference paperLow-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Conference paperSilicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ECTC 2005
Conference paperElectrical and reliability evaluation of Cu/Low-k integration: Exploration of PVD barrier/seed and CVD SiC(N,H) cap depositions
- C.-C. Yang
- D. Edelstein
- et al.
- 2004
- ADMETA 2004
Conference paper