High-performance sub-0.25 μm CMOS technology with multiple thresholds and copper interconnects
- L. Su
- R. Schulz
- et al.
- 1998
- VLSI Technology 1998
Conference paper
Publications
147 results for Daniel Edelstein
Evaluation of Cu wiring in a production 64 Mb DRAM
- W. Cote
- G. Costrini
- et al.
- 1998
- VLSI Technology 1998
Conference paperSpiral and solenoidal inductor structures on silicon using Cu-damascene interconnects
- D. Edelstein
- J.N. Burghartz
- 1998
- IITC 1998
Conference paperCopper dual damascene wiring for sub-0.25 μm CMOS technology
- J. Heidenreich
- D. Edelstein
- et al.
- 1998
- IITC 1998
Conference paperCopper ULSI interconnect technology
- D. Edelstein
- 1998
- MRS Spring 1998
Conference paperRF circuit design aspects of spiral inductors on silicon
- J.N. Burghartz
- D. Edelstein
- et al.
- 1998
- ISSCC 1998
Conference paperSpiral inductors and transmission lines in silicon technology using copper-damascene interconnects and low-loss substrates
- Joachim N. Burghartz
- Daniel C. Edelstein
- et al.
- 1997
- IEEE T-MTT
PaperFull copper wiring in a sub-0.25 μm CMOS ULSI technology
- D. Edelstein
- J. Heidenreich
- et al.
- 1997
- IEDM 1997
Conference paperMonolithic Spiral Inductors Fabricated Using a VLSI Cu-Damascene Interconnect Technology and Low-Loss Substrates
- J.N. Burghartz
- D. Edelstein
- et al.
- 1996
- IEDM 1996
Conference paperDiamondlike carbon materials as low-k dielectrics for multilevel interconnects in ULSI
- A. Grill
- V.V. Patel
- et al.
- 1996
- MRS Fall Meeting 1996
Conference paper