Vertical channel devices enabled by through silicon via (TSV) technologies
- C. Kothandaraman
- Sami Rosenblatt
- et al.
- 2016
- IEDM 2016
Conference paper
Publications
12 results for N. Robson
Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias
- Toshiaki Kirihata
- John Golz
- et al.
- 2016
- IEEE JESTCS
Paper3Di DC-DC Buck Micro Converter with TSVs, Grind Side Inductors, and Deep Trench Decoupling Capacitors in 32nm SOI CMOS
- J. Safran
- Giri N. K. Rangan
- et al.
- 2016
- ECTC 2016
Conference paperOxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications
- C. Kothandaraman
- X. Chen
- et al.
- 2015
- IRPS 2015
Conference paper0.026μm2 high performance Embedded DRAM in 22nm technology for server and SOC applications
- C. Pei
- G. Wang
- et al.
- 2014
- IEDM 2014
Conference paperCopper through silicon via (TSV) for 3D integration
- C. Kothandaraman
- B. Himmel
- et al.
- 2012
- IRPS 2012
Conference paperA 0.039um2 high performance eDRAM cell based on 32nm high-K/metal SOI technology
- Nauman Z. Butt
- Kevin McStay
- et al.
- 2010
- IEDM 2010
Conference paperReliability investigation of NiPtSi electrical fuse with different programming mechanisms
- C. Tian
- D. Moy
- et al.
- 2007
- IIRW 2007
Conference paperA compact eFUSE programmable array memory for SOI CMOS
- John Safran
- Alan Leslie
- et al.
- 2007
- VLSI Circuits 2007
Conference paperElectrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips
- Norm Robson
- John Safran
- et al.
- 2007
- CICC 2007
Conference paper