Fully depleted extremely thin SOI technology fabricated by a novel integration scheme featuring implant-free, zero-silicon-loss, and faceted raised source/drain
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- VLSI Technology 2009
Conference paper
Publications
16 results for Jing Wang
Gate-induced-drain-leakage current in 45-nm CMOS technology
- Xiaohin Yuan
- Jae-Eun Park
- et al.
- 2008
- IEEE T-DMR
PaperExperimental analysis of on-wafer de-embedding techniques for RF modeling of advanced RFCMOS and BiCMOS technologies
- Jing Wang
- Robert Groves
- et al.
- 2007
- ARFTG 2007
Conference paperCharacterization and analysis of gate-induced-drain-leakage current in 45 nm CMOS technology
- Xiaobin Yuan
- Jae-Eun Park
- et al.
- 2007
- IIRW 2007
Conference paperRF characterization and parameter extraction for CMOS device models
- John J. Pekarik
- Basanth Jagannathan
- et al.
- 2007
- SiRF 2007
Conference paperSelective epitaxial channel ground plane thin SOI CMOS devices
- Zhibin Ren
- M. Ieong
- et al.
- 2005
- IEDM 2005
Conference paper