1 GHz leading zero anticipator using independent sign-bit determination logic
- Kyung Tek Lee
- K. Nowka
- 2000
- VLSI Circuits 2000
Conference paper
Publications
51 results for Kevin Nowka
'Timing Closure by Design,' a high frequency microprocessor design methodology
- S.D. Posluszny
- Naoaki Aoki
- et al.
- 2000
- DAC 2000
Conference paperCustom circuit design as a driver of microprocessor performance
- David H. Allen
- Sang H. Dhong
- et al.
- 2000
- IBM J. Res. Dev
PaperBeyond 1 GHz
- H.P. Hofstee
- K. Nowka
- 1999
- CICC 1999
PaperHigh speed serializing/de-serializing design-for-test method for evaluating a 1 GHz microprocessor
- D. Heidel
- S. Dhong
- et al.
- 1998
- VTS 1998
Conference paperDesign methodology for a 1.0 GHz microprocessor
- S.D. Posluszny
- Naoaki Aoki
- et al.
- 1998
- ICCD 1998
Conference paperCircuit design techniques for a gigahertz integer microprocessor
- K. Nowka
- Tibi Galambos
- 1998
- ICCD 1998
Conference paper1.0-GHz single-issue 64-bit PowerPC integer processor
- Joel Silberman
- Naoaki Aoki
- et al.
- 1998
- IEEE Journal of Solid-State Circuits
PaperParallel condition-code generation for high-frequency PowerPC microprocessors
- Jeffrey L. Burns
- K. Nowka
- 1998
- VLSI Circuits 1998
Conference paperDesigning for a gigahertz
- H. Peter Hofstee
- Sang H. Dhong
- et al.
- 1998
- IEEE Micro
Paper