Optimization of high κ gate stacks with poly-Si, FUSI and metal electrodes
- R. Jammy
- V. Narayanan
- et al.
- 2005
- ISTC 2005
Conference paper
Publications
32 results for Joseph S. Newbury
Systematic study of workfunction engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks
- Y.-H. Kim
- C. Cabral Jr.
- et al.
- 2005
- IEDM 2005
Conference paperPoly-Si/high-k gate stacks with near-ideal threshold voltage and mobility
- M.M. Frank
- V.K. Paruchuri
- et al.
- 2005
- VLSI-TSA 2005
Conference paperAdvanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Conference paperAggressively scaled (0.143 μm 2) 6T-SRAM cell for the 32 nm node and beyond
- D. Fried
- J. Hergenrother
- et al.
- 2004
- IEDM 2004
Conference paperCharge trapping in aggressively scaled metal gate/high-κ stacks
- E. Gusev
- V. Narayanan
- et al.
- 2004
- IEDM 2004
Conference paperSystematic study of pFET Vt with Hf-based gate stacks with poly-Si and FUSI gates
- E. Cartier
- V. Narayanan
- et al.
- 2004
- VLSI Technology 2004
Conference paperThreshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SIIS)
- Jakub Kedzierski
- Diane Boyd
- et al.
- 2003
- IEDM 2003
Conference paperTwo gates are better than one
- P. Solomon
- K.W. Guarini
- et al.
- 2003
- IEEE Circuits and Devices Magazine
PaperMetal-gate FinFET and fully-depleted SOI devices using total gate silicidation
- Jakub Kedzierski
- Edward Nowak
- et al.
- 2002
- IEDM 2002
Conference paper