Challenges in processor modeling and validation
- Pradip Bose
- Thomas M. Conte
- et al.
- 1999
- IEEE Micro
Paper
Publications
141 results for Pradip Bose
Performance test case generation for microprocessors
- Pradip Bose
- 1998
- VTS 1998
Conference paperAccuracy and speed-up of parallel trace-driven architectural simulation
- A.-T. Nguyen
- Pradip Bose
- et al.
- 1997
- IPPS 1997
Conference paperPARSIM: A parallel trace-driven simulation facility for fast and accurate performance analysis studies
- A.-T. Nguyen
- J.-D. Wellman
- et al.
- 1997
- HPCC 1997
Conference paperRepresentative traces for processor models with infinite cache
- V.S. Iyengar
- Louise Trevillyan
- et al.
- 1996
- HPCA 1996
Conference paperArchitectural timing verification of CMOS RISC processors
- Pradip Bose
- S. Surya
- 1995
- IBM J. Res. Dev
PaperEarly performance estimation of super scalar machine models
- Pradip Bose
- 1991
- ICCD 1991
Conference paperParallel logic/fault simulation of VLSI array logic
- Pradip Bose
- 1987
- ICCAD 1987
Conference paperA Novel Technique for Efficient Parallel Implementation of a Classical Logic/ Fault Simulation Problem
- Pradip Bose
- 1988
- IEEE TC
PaperOPTIMAL CODE GENERATION ALGORITHMS FOR ARITHMETIC EXPRESSIONS EXECUTING ON PIPELINED, DECOUPLED ARCHITECTURES.
- Pradip Bose
- 1985
- ICCD 1985
Conference paper