A 7-nm Four-Core Mixed-Precision AI Chip with 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
- Sae Kyu Lee
- Ankur Agrawal
- et al.
- 2021
- IEEE JSSC
Paper
Publications
11 results for Silvia Müller
RaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
- Swagath Venkataramani
- Vijayalakshmi Srinivasan
- et al.
- 2021
- ISCA 2021
Conference paperEnergy Efficiency Boost in the AI-Infused POWER10 Processor
- Brian Thompto
- Dq Nguyen
- et al.
- 2021
- ISCA 2021
Conference paperA matrix math facility for Power ISA™ processors
- Jose Moreira
- Kit Barton
- et al.
- 2021
- arXiv
PaperA 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling
- Ankur Agrawal
- Saekyu Lee
- et al.
- 2021
- ISSCC 2021
Conference paperEfficient AI System Design with Cross-Layer Approximate Computing
- Swagath Venkataramani
- Xiao Sun
- et al.
- 2020
- Proceedings of the IEEE
PaperA 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
- Jinwook Oh
- Sae Kyu Lee
- et al.
- 2020
- VLSI Circuits 2020
Conference paperDLFloat: A 16-b Floating Point Format Designed for Deep Learning Training and Inference
- Ankur Agrawal
- Bruce Fleischer
- et al.
- 2019
- ARITH 2019
Conference paperA Scalable Multi-TeraOPS Core for AI Training and Inference
- Sunil Shukla
- Bruce Fleischer
- et al.
- 2018
- IEEE SSC-L
PaperA Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and Inference
- Bruce Fleischer
- Sunil Shukla
- et al.
- 2018
- VLSI Circuits 2018
Conference paper