Air spacer for 10nm FinFET CMOS and beyond
- K. Cheng
- C. Park
- et al.
- 2016
- IEDM 2016
Conference paper
Publications
27 results for Junjun Li
Junction engineering for SOI SCR triggering and performance improvement
- You Li
- Junjun Li
- et al.
- 2014
- EOS/ESD 2014
Conference paperESD device performance analysis in a 14nm Fin FET SOI CMOS technology: Fin-based versus planar-based
- Junjun Li
- Robert Gauthier
- et al.
- 2014
- EOS/ESD 2014
Conference paperBottom oxidation through STI (BOTS) - A novel approach to fabricate dielectric isolated FinFETs on bulk substrates
- K. Cheng
- S.-C. Seo
- et al.
- 2014
- VLSI Technology 2014
Conference paperHigh performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond
- Q. Liu
- M. Vinet
- et al.
- 2013
- IEDM 2013
Conference paperInvestigation of SOI SCR triggering and current sustaining under DC and TLP conditions
- Junjun Li
- James Di Sarro
- et al.
- 2013
- EOS/ESD 2013
Conference paperMaximizing ESD robustness of current-mode-logic (CML) driver with internal gate bias network
- You Li
- James Di Sarro
- et al.
- 2013
- EOS/ESD 2013
Conference paperAggressively scaled strained silicon directly on insulator (SSDOI) FinFETs
- A. Khakifirooz
- R. Sreenivasan
- et al.
- 2013
- S3S 2013
Conference paperHigh performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
- K. Cheng
- A. Khakifirooz
- et al.
- 2012
- IEDM 2012
Conference paperDesign and optimization of scr devices for on-chip esd protection in advanced SOI CMOS technologies
- Junjun Li
- James Di Sarro
- et al.
- 2012
- EOS/ESD 2012
Conference paper