NanoStack Transistor Architecture for CMOS 7A Node and Beyond
- S. Reboh
- C. Zhang
- et al.
- 2025
- VLSI Technology and Circuits 2025
Conference paper
Publications
16 results for Eric Miller
Future of plasma etching for microelectronics: Challenges and opportunities
- Gottlieb S. Oehrlein
- Stephan M. Brandstadter
- et al.
- 2024
- Journal of Vacuum Science and Technology B
PaperDevelopment of Epitaxial SiGeB as a Test Vehicle to Evaluate Source-Drain Etchout during Channel Release of Gate-all-Around Devices: Topic/category: AEPM: Advanced Equipment Processes and Materials
- M. Nasseri
- C. Durfee
- et al.
- 2024
- ASMC 2024
Conference paperScaling opportunities for Gate-All-Around: A patterning perspective
- I. Seshadri
- E. Miller
- et al.
- 2023
- IEDM 2023
Conference paperFunctional Testing of AI Cores through Thinned 3D I/O Buffer Dies in 3D Die-Stacked Modules
- Mukta Farooq
- Arvind Kumar
- et al.
- 2022
- ECTC 2022
Conference paperPlasma-based area selective deposition for extreme ultraviolet resist defectivity reduction and process window improvement
- Katie Lutker-Lee
- Jennifer Church
- et al.
- 2022
- Journal of Vacuum Science and Technology B
PaperVertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices
- H. Jagannathan
- B. Anderson
- et al.
- 2021
- IEDM 2021
Conference paperContact local CD uniformity optimization through etch shrink
- Eric Miller
- Junling Sun
- et al.
- 2021
- SPIE Advanced Lithography 2021
Conference paperFundamental characterization of stochastic variation for improved single-expose extreme ultraviolet patterning at aggressive pitch
- Jennifer Church
- Luciana Meli
- et al.
- 2020
- J. Micro/Nanolithogr. MEMS MOEMS
PaperFundamental characterization of stochastic variation for improved single-expose EUV patterning at aggressive pitch
- Jennifer Church
- Luciana Meli
- et al.
- 2020
- SPIE Advanced Lithography 2020
Conference paper