A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- ISSCC 2024
Conference paper
Publications
16 results for Kyu-Hyoun Kim
Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- IEEE Journal of Solid-State Circuits
PaperA Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS
- Ankur Agrawal
- Monodeep Kar
- et al.
- 2023
- VLSI Technology 2023
Conference paperA 7-nm Four-Core Mixed-Precision AI Chip with 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
- Sae Kyu Lee
- Ankur Agrawal
- et al.
- 2021
- IEEE JSSC
PaperRaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
- Swagath Venkataramani
- Vijayalakshmi Srinivasan
- et al.
- 2021
- ISCA 2021
Conference paperA 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling
- Ankur Agrawal
- Saekyu Lee
- et al.
- 2021
- ISSCC 2021
Conference paperTemperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem
- Saravanan Sethuraman
- Venkata Kalyan Tavva
- et al.
- 2020
- IEEE TCADIS
PaperOpenCAPI memory interface signal integrity study for high-speed DDR5 differential DIMM channel with standard loss FR-4 material and SNIA SFF-TA-1002 connector
- Biao Cai
- Jose Hejase
- et al.
- 2019
- ECTC 2019
Conference paperAttaché: Towards ideal memory compression by mitigating metadata bandwidth overheads
- Seokin Hong
- Prashant J. Nair
- et al.
- 2018
- MICRO 2018
Conference paperConTutto - a novel FPGA-based prototyping platform enabling innovation in the memory subsystem of a server class processor
- Bharat Sukhwani
- Thomas Roewer
- et al.
- 2017
- MICRO 2017
Conference paper