A 5.6-100K, 128ppm/K Cryo-CMOS Current Reference
- Subhajit Ray
- David Frank
- et al.
- 2025
- VLSI Technology and Circuits 2025
Conference paper
Publications
109 results for David J. Frank
Cryogenic CMOS Circuits for Future Scaled Quantum Computing Systems: Challenges and Solutions
- Bodhisatwa Sadhu
- Kevin Tien
- et al.
- 2025
- CICC 2025
Conference paperA 12.8 mW/ channel cryogenic RF-AWG in 14nm FinFET for transmon qubit control
- S. Chakraborty
- K. Tien
- et al.
- 2024
- ESSERC 2024
Conference paperCharacterization of 14nm CMOS Technology At Cryogenic Temperatures Using Dense Addressable Arrays
- R. Robertazzi
- D.J. Frank
- et al.
- 2024
- VTS 2024
Conference paperUsing Cryogenic CMOS Control Electronics to Enable a Two-Qubit Cross-Resonance Gate
- Devin Underwood
- Joseph A. Glick
- et al.
- 2024
- PRX Quantum
PaperA Simulation Study on Minimizing Threshold Voltage Variability by Optimizing Oxygen Vacancy Concentration under Metal Gate Granularity
- Madhu Padmanabha Sumangala
- Ahish Shylendra
- et al.
- 2020
- IEEE Electron Device Letters
PaperSynthesis design strategies for energy-efficient microprocessors
- Ching Zhou
- Yu-Shiang Lin
- et al.
- 2016
- ICCD 2016
Conference paperDevices and circuits at the end of scaling
- David J. Frank
- 2016
- SNW 2016
Conference paperToward ultimate scaling of MOSFET
- Ramachandran Muralidhar
- Isaac Lauer
- et al.
- 2016
- IEEE T-ED
PaperToward high-performance digital logic technology with carbon nanotubes
- George S. Tulevski
- Aaron D. Franklin
- et al.
- 2014
- ACS Nano
Review