Electrical performances and structural designs of copper bonding in wafer-level three-dimensional integration
- K.N. Chen
- A. Young
- et al.
- 2011
- Journal of Nanoscience and Nanotechnology
Paper
Publications
5 results for S.H. Lee
Fabrication of nano-scale Cu bond pads with seal design in 3D integration applications
- K.N. Chen
- Cornelia Tsang
- et al.
- 2011
- Journal of Nanoscience and Nanotechnology
PaperInvestigations of Cu bond structures and demonstration of a wafer-level 3D integration scheme with W TSVs
- K.N. Chen
- Cyril Cabral Jr.
- et al.
- 2010
- VLSI-TSA 2010
Conference paperImproved manufacturability of Cu bond pads and implementation of seal design in 3D integrated circuits and packages
- K.N. Chen
- C. Tsang
- et al.
- 2006
- VMIC 2006
Conference paperStructure, design and process control for Cu bonded interconnects in 3D integrated circuits
- Kuan-Neng Chen
- Sang Hwui Lee
- et al.
- 2006
- IEDM 2006
Conference paper