Sub-μm, planarized, Nb-AlOx-Nb Josephson process for 125 mm wafers developed in partnership with Si technology
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Publications
97 results for Karen Petrillo
Gel resist processing for submicron CMOS and bipolar circuits
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- 1989
- Proceedings of SPIE 1989
Conference paperA high performance liquid-nitrogen CMOS SRAM technology
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- 1988
- ESSDERC 1988
Conference paperA Highly Latchup-Immune 1-μm CMOS Technology Fabricated with 1-MeV Ion Implantation and Self-Aligned TiSi2
- Fang-Shi J. Lai
- L.K. Wang
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- 1986
- IEEE T-ED
PaperHIGHLY LATCHUP-IMMUNE 1- mu m CMOS TECHNOLOGY FABRICATED WITH 1 Mev ION IMPLANTATION AND SELF-ALIGNED TiSi//2.
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- IEDM 1984
Conference paperA Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy
- Yuan Taur
- Genda J. Hu
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- 1985
- IEEE Journal of Solid-State Circuits
PaperA Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy
- Yuan Taur
- Genda J. Hu
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- 1985
- IEEE T-ED
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