A 28GHz SiGe BiCMOS phase invariant VGA
- Bodhisatwa Sadhu
- John F. Bulzacchelli
- et al.
- 2016
- RFIC 2016
Conference paper
Publications
65 results for John F. Bulzacchelli
A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks
- Alexander V. Rylyakov
- Jonathan E. Proesel
- et al.
- 2015
- IEEE JSSC
PaperA 1.8-pJ/bit 16x16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration
- Timothy O. Dickson
- Yong Liu
- et al.
- 2015
- CICC 2015
Conference paperA 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS
- Hayun Chung
- Zeynep Toprak-Deniz
- et al.
- 2015
- Analog Integr Circuits Signal Process
PaperA 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology
- Timothy O. Dickson
- Yong Liu
- et al.
- 2015
- IEEE JSSC
PaperA 25Gb/s burst-mode receiver for rapidly reconfigurable optical networks
- Alexander V. Rylyakov
- Jonathan E. Proesel
- et al.
- 2015
- ISSCC 2015
Conference paperA 25 Gb/s burst-mode receiver for low latency photonic switch networks
- Alexander V. Rylyakov
- Jonathan E. Proesel
- et al.
- 2015
- OFC 2015
Conference paperA WDM-Compatible 4 × 32-Gb/s CMOS-driven electro-absorption modulator array
- Benjamin G. Lee
- Renato Rimolo-Donadio
- et al.
- 2015
- OFC 2015
Conference paperThe 12-core POWER8™ processor with 7.6 Tb/s IO bandwidth, integrated voltage regulation, and resonant clocking
- Eric J. Fluhr
- Steve Baumgartner
- et al.
- 2015
- IEEE JSSC
PaperA 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology
- Timothy O. Dickson
- Yong Liu
- et al.
- 2014
- CICC 2014
Conference paper