W.Y. Yu, S. Stoltz, et al.
Physical Review B - CMMP
The Letter describes the first experimental result of a high-speed low-power ECL-based AC-coupled complementary push-pull circuit. Implemented in a 0.8µm high-performance fully complementary bipolar technology with 50GHz npn transistor and 13GHz pnp transistor, a power-delay product of 34fJ (23.2ps at 1.48mW) has been achieved compared with 67 fJ (45 ps at 1.48mW) for the npn-only ECL circuit. © 1993, The Institution of Electrical Engineers. All rights reserved.
W.Y. Yu, S. Stoltz, et al.
Physical Review B - CMMP
C.T. Chuang, Ken Chin, et al.
IEEE Journal of Solid-State Circuits
Rajiv V. Joshi, Richard Q. Williams, et al.
ESSDERC/ESSCIRC 2004
G. Shahidi, J. Warnock, et al.
VLSI Technology 1992