Pooja Aggarwal, Ajay Gupta, et al.
ICSOC 2020
Computer systems strive for higher performance, improved energy efficiency, reliability, fault tolerance, and sustainability. Dynamically optimizing guard bands can help achieve all these goals with small design and chip area cost, using on-chip sensors and targeted investments in test and firmware. Many chips use fixed voltage guard bands at each supported frequency to cover all variation sources threatening correct operation in the field, including VDD power-supply droops from sudden workload changes, temperature excursions, and device aging. Advances in robust error recovery and power-supply droop mitigation techniques have been used separately to reduce required guard bands and save power. In this work, we describe a full system that dynamically optimizes guard bands by simultaneously leveraging both robust droop mitigation and robust error recovery to deliver significant system power savings.
Pooja Aggarwal, Ajay Gupta, et al.
ICSOC 2020
Seetharami Seelam, Apoorve Mohan, et al.
ISCA 2023
Pratik Mishra, Caner Gözübüyük, et al.
IAAI 2026
David Wolpert, Gerry Strevig, et al.
ISSCC 2025