SiGe Channel for Scaled Gate-All-Around Nanosheet pFET Transistor for Advanced Logic Applications

Stacked Gate-All-Around (GAA) nanosheet p-type Field Effect Transistors (FETs) incorporating Si1-xGex channel have been successfully fabricated on scaled devices to investigate their electrical performance for next-generation logic applications. The $Si{_1-_x}Ge{_x}$ NS channels demonstrate high crystalline quality and substantial compressive stress (0.6-1 Gpa), enabling enhanced carrier transport in the scaled pFET device with 15 nm gate length and 54 nm Contacted Poly Pitch (CPP). The influence of Ge fraction and junction overlap on the device characteristics of $Si{_1-_x}Ge{_x}$ NS channel pFETs has been systematically analyzed to assess their impact on device scalability and transport characteristics. It is found that the $Si{_1-_x}Ge{_x}$ NS channel provides a 17% uplift in IEFF due to a corresponding channel resistance reduction of 34% while maintaining an excellent subthreshold slope of below 75 mV/dec.