High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length
- Xiao Sun
- Christopher P. D’Emic
- et al.
- 2017
- VLSI Technology 2017
Conference paper
Publications
15 results for Kuen-Ting Shiu
CMOS compatible high performance IIIV devices: Opportunities and challenges
- Yanning Sun
- Kuen-Ting Shiu
- et al.
- 2016
- ECS Meeting 2016
Conference paperMaterials challenges for III-V/Si co-integrated CMOS
- Devendra Sadana
- Cheng-Wei Cheng
- et al.
- 2015
- CICC 2015
Conference paperAn InGaAs on Si platform for CMOS with 200 mm InGaAs-OI substrate, gate-first, replacement gate planar and FinFETs down to 120 nm contact pitch
- V. Djara
- Veeresh Deshpande
- et al.
- 2015
- VLSI Technology 2015
Conference paperHigh-performance CMOS-compatible self-aligned In0.53Ga0.47As MOSFETs with GMSAT over 2200 μs/μm at VDD = 0.5 v
- Yanning Sun
- Amlan Majumdar
- et al.
- 2014
- IEDM 2014
Conference paperPolarization-free GaN emitters in the ultraviolet and visible spectra via heterointegration on CMOS-compatible Si (100)
- Can Bayram
- John A. Ott
- et al.
- 2015
- SPIE OPTO 2015
Conference paperA four-FET method for extracting mobility in FETs without field oxide
- Amlan Majumdar
- Ko-Tao Lee
- et al.
- 2014
- IEEE T-ED
PaperCMOS-Compatible self-aligned In0.53Ga0.47As MOSFETs with gate lengths down to 30 nm
- Amlan Majumdar
- Yanning Sun
- et al.
- 2014
- IEEE T-ED
PaperTowards large size substrates for III-V co-integration made by direct wafer bonding on Si
- Nicolas Daix
- Emanuele Uccelli
- et al.
- 2014
- APL Materials
PaperCubic phase GaN on nano-grooved Si (100) via maskless selective area epitaxy
- Can Bayram
- John A. Ott
- et al.
- 2014
- Advanced Functional Materials
Paper