Progress and Gaps in Double Spin-torque MTJs for Last Level Cache Applications

We demonstrate 25% efficiency improvement in double spin-torque magnetic tunnel junctions (DS-MTJs) compared to standard single-MTJs, without degrading other properties. Optimized stacks enabled reliable setting of the two reference layers into the desired anti-parallel alignment for a 4-kbit DS-MTJ array, where switching of all 4k devices with 2 ns write pulses was demonstrated for the first time. Activation energy ~ 60 kT at CD ~ 40 nm was achieved with new free layer designs. Devices with optimized DS-MTJ free layers also exhibit steep write-error-rate (WER) slopes, comparable to those of the best single-MTJs reported to date.